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388 lines
10 KiB
388 lines
10 KiB
/* |
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* Copyright (c) 2018-2018 Ambarella, Inc. |
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* 2018/06/01 - [Zhikan Yang] created file |
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* |
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* This file and its contents ("Software") are protected by intellectual |
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* property rights including, without limitation, U.S. and/or foreign copyrights. |
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* This Software is also the confidential and proprietary information of |
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* Ambarella, Inc. and its licensors. You may not use, reproduce, disclose, |
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* distribute, modify, or otherwise prepare derivative works of this Software |
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* or any portion thereof except pursuant to a signed license agreement or |
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* nondisclosure agreement with Ambarella, Inc. or its authorized affiliates. |
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* In the absence of such an agreement, you agree to promptly notify and |
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* return this Software to Ambarella, Inc. |
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* |
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* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, |
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF NON-INFRINGEMENT, |
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* MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO |
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* EVENT SHALL AMBARELLA, INC. OR ITS AFFILIATES BE LIABLE FOR ANY DIRECT, |
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; COMPUTER FAILURE OR MALFUNCTION; |
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR |
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF |
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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*/ |
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#ifndef __CAVALRY_IOCTL_H__ |
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#define __CAVALRY_IOCTL_H__ |
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#include <linux/ioctl.h> |
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#define CAVALRY_DEV_NODE "/dev/cavalry" |
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#define MAX_PORT_CNT (128) |
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#define MAX_POKE_CNT (64) |
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#define MAX_DAG_CNT (256) |
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#define VERSION_INFO_OFFSET (0x40) |
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#define CAVALRY_SLOT_ID_OFFSET (0x04) |
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#define CAVALRY_HARRIS_H_BLOCKS (8) |
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#define CAVALRY_HARRIS_V_BLOCKS (8) |
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#define CAVALRY_HARRIS_MAX_POINTS_PER_BLOCK (32) |
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#define FEX_MIN_NMS_WINDOW (1) |
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#define FEX_MAX_NMS_WINDOW (8) |
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typedef enum { |
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CHIP_TYPE_CV22 = 0, |
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CHIP_TYPE_CV2 = 1, |
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CHIP_TYPE_CV25 = 2, |
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} chip_type_t; |
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typedef enum { |
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CAVALRY_LOG_LEVEL_SILENT = 0, |
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CAVALRY_LOG_LEVEL_MINIMAL, |
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CAVALRY_LOG_LEVEL_NORMAL, |
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CAVALRY_LOG_LEVEL_VERBOSE, |
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CAVALRY_LOG_LEVEL_DEBUG, |
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CAVALRY_LOG_LEVEL_NUM, |
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CAVALRY_LOG_LEVEL_FIRST = CAVALRY_LOG_LEVEL_SILENT, |
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CAVALRY_LOG_LEVEL_LAST = CAVALRY_LOG_LEVEL_DEBUG, |
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} cavalry_log_level_t; |
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struct cavalry_set_log_level { |
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cavalry_log_level_t log_level; |
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uint32_t rval; |
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}; |
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struct version_info_s { |
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uint32_t chip; |
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uint32_t ucode_version; |
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uint32_t build_date; |
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uint32_t git_hash; |
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uint32_t hotlink_fw_version; |
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}; |
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typedef enum { |
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CAVALRY_MEM_ALL = 0x00, |
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CAVALRY_MEM_CMD = 0x01, |
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CAVALRY_MEM_MSG = 0x02, |
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CAVALRY_MEM_LOG = 0x03, |
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CAVALRY_MEM_CMD_FEX = 0x04, |
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CAVALRY_MEM_MSG_FEX = 0x05, |
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CAVALRY_MEM_CMD_FMA = 0x06, |
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CAVALRY_MEM_MSG_FMA = 0x07, |
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CAVALRY_MEM_UCODE = 0x08, |
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CAVALRY_MEM_HOTLINK_SLOT0 = 0x09, |
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CAVALRY_MEM_HOTLINK_SLOT1 = 0x0A, |
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CAVALRY_MEM_HOTLINK_SLOT2 = 0x0B, |
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CAVALRY_MEM_HOTLINK_SLOT3 = 0x0C, |
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CAVALRY_MEM_USER = 0x0D, |
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CAVALRY_MEM_NUM = 0x0E, |
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CAVALRY_MEM_FIRST = CAVALRY_MEM_ALL, |
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CAVALRY_MEM_LAST = CAVALRY_MEM_USER, |
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} CAVALRY_MEM; |
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struct cavalry_log_entry { |
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uint32_t seq_num; |
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uint8_t thread_id; |
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uint8_t slot_id; |
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uint8_t reserved[2]; |
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uint32_t format_offset; |
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uint32_t arg1; |
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uint32_t arg2; |
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uint32_t arg3; |
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uint32_t arg4; |
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uint32_t arg5; |
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}; |
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struct cavalry_querybuf { |
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CAVALRY_MEM buf; |
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unsigned long length; |
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unsigned long offset; |
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}; |
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struct cavalry_port_desc { |
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uint32_t port_dram_addr; |
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uint32_t port_boffset_in_dag; |
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uint32_t port_bsize; |
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uint32_t port_daddr_increment; |
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}; |
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struct cavalry_poke_desc { |
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uint32_t poke_val; |
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uint32_t poke_vaddr; |
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uint32_t poke_bsize; |
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}; |
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struct cavalry_dag_desc { |
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uint32_t dvi_mode : 1; |
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uint32_t use_ping_pong_vmem : 1; |
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uint32_t reserved : 14; |
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uint32_t dag_loop_cnt : 16; |
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uint32_t dvi_dram_addr; |
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uint32_t dvi_img_vaddr; |
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uint32_t dvi_img_size; |
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uint32_t dvi_dag_vaddr; |
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uint32_t reserved1[4]; |
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uint32_t port_cnt; |
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uint32_t poke_cnt; |
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struct cavalry_port_desc port_desc[MAX_PORT_CNT]; |
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struct cavalry_poke_desc poke_desc[MAX_POKE_CNT]; |
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}; |
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typedef enum { |
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MSG_RVAL_NONE, |
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MSG_RVAL_INVALID_CMD, |
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MSG_RVAL_INVALID_DAGCNT, |
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MSG_RVAL_INVALID_DAGDESC, |
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MSG_RVAL_INVALID_SLOT_ID, |
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MSG_RVAL_FEX_INSUFFICIENT_DRAM, |
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MSG_RVAL_FMA_INSUFFICIENT_DRAM, |
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MSG_RVAL_VP_RESERVED_VMEM_TRASHED, |
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} cavalry_msg_rval_t; |
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typedef enum { |
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HOTLINK_SLOT_0 = 0, |
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HOTLINK_SLOT_1 = 1, |
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HOTLINK_SLOT_2 = 2, |
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HOTLINK_SLOT_3 = 3, |
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HOTLINK_SLOT_NUM = 4, |
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HOTLINK_SLOT_FIRST = HOTLINK_SLOT_0, |
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HOTLINK_SLOT_LAST = HOTLINK_SLOT_3, |
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HOTLINK_SLOT_CAVALRY_FRAMEWORK = 0xFF, |
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} hotlink_slot_t; |
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typedef enum { |
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CAVALRY_FMA_MODE_TEMPORAL = 0, |
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CAVALRY_FMA_MODE_STEREO, |
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CAVALRY_FMA_MODE_NUM, |
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CAVALRY_FMA_MODE_FIRST = CAVALRY_FMA_MODE_TEMPORAL, |
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CAVALRY_FMA_MODE_LAST = CAVALRY_FMA_MODE_STEREO, |
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} cavalry_fma_mode_t; |
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struct cavalry_run_dags { |
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uint32_t rval; |
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uint32_t start_tick; |
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uint32_t end_tick; |
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uint32_t finish_dags; |
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uint32_t dag_cnt; |
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struct cavalry_dag_desc dag_desc[MAX_DAG_CNT]; |
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}; |
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struct cavalry_early_quit { |
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uint32_t early_quit_all : 1; |
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uint32_t reserved : 31; |
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}; |
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struct cavalry_mem { |
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uint32_t cache_en : 1; /* 0: nocached; 1: cached */ |
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uint32_t reserved : 31; |
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unsigned long length; /* as input: the mem part size to be allocated |
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as return: the real size of the allocated mem part */ |
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unsigned long offset; /* the physical address of the allocated mem part */ |
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}; |
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struct cavalry_cache_mem { |
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uint32_t clean : 1; /* do after arm write: cache -> dram */ |
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uint32_t invalid : 1; /* do before arm read: dram -> cache */ |
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uint32_t reserved : 30; |
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unsigned long length; |
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unsigned long offset; /* the physical address of the allocated mem part */ |
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}; |
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struct cavalry_usage_mem { |
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unsigned long used_length; |
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unsigned long free_length; |
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}; |
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struct cavalry_run_hotlink_slot { |
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uint8_t slot_id; |
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uint8_t reserved0[3]; |
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uint32_t arg_daddr; |
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uint32_t slot_rval; |
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uint32_t start_tick; |
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uint32_t end_tick; |
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}; |
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struct cavalry_fex_query { |
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/* Input */ |
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uint16_t img_width; |
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uint16_t img_height; |
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uint16_t img_pitch; |
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uint16_t harris_en : 2; |
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uint16_t stereo_en : 1; |
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uint16_t dump_harris_score : 1; |
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uint16_t reserved1 : 12; |
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/* Output */ |
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uint32_t dram_required; |
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}; |
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typedef enum { |
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FEX_CFG_MASK_NMS_THRESHOLD = (1 << 0), |
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FEX_CFG_MASK_NMS_WINDOW_FOR_HARRIS = (1 << 1), |
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FEX_CFG_MASK_ALL = FEX_CFG_MASK_NMS_THRESHOLD | FEX_CFG_MASK_NMS_WINDOW_FOR_HARRIS, |
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} fex_cfg_mask_t; |
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struct fex_user_cfg { |
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uint32_t cfg_mask; |
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uint16_t nms_threshold; |
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uint16_t nms_window_for_harris : 4; |
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uint16_t reserved2 : 12; |
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}; |
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typedef enum { |
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STEREO_PROFILE_DEFAULT = 0, |
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STEREO_PROFILE_1, |
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STEREO_PROFILE_NUM, |
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} stereo_profile_t; |
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struct cavalry_fex_run { |
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/* Input */ |
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uint16_t img_width; |
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uint16_t img_height; |
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uint16_t img_pitch; |
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uint16_t harris_en : 2; |
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uint16_t stereo_en : 1; |
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uint16_t stereo_profile : 5; |
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uint16_t dump_harris_score : 1; |
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uint16_t reserved1 : 7; |
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struct fex_user_cfg fex_cfg; |
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uint32_t output_daddr; |
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uint32_t output_size; |
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uint32_t luma_daddr[2]; |
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/* Output */ |
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uint32_t rval; |
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uint32_t disparity_daddr; |
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uint32_t disparity_size; |
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uint32_t invalid_disparities; |
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uint16_t disparity_width; |
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uint16_t disparity_height; |
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uint16_t disparity_pitch; |
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uint16_t reserved2; |
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uint32_t harris_count_daddr[2]; |
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uint32_t harris_count_size[2]; |
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uint32_t harris_point_daddr[2]; |
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uint32_t harris_point_size[2]; |
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uint32_t brief_descriptor_daddr[2]; |
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uint32_t brief_descriptor_size[2]; |
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uint32_t start_tick; |
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uint32_t end_tick; |
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}; |
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struct cavalry_fma_query { |
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/* Output */ |
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uint32_t dram_required; |
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}; |
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typedef enum { |
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FMA_CFG_MASK_MIN_THRESHOLD = (1 << 0), |
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FMA_CFG_MASK_RATIO_THRESHOLD = (1 << 1), |
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FMA_CFG_MASK_WIN_WIDTH = (1 << 2), |
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FMA_CFG_MASK_WIN_HEIGHT = (1 << 3), |
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FMA_CFG_MASK_X_THRESHOLD_R = (1 << 4), |
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FMA_CFG_MASK_X_THRESHOLD_L = (1 << 5), |
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FMA_CFG_MASK_Y_THRESHOLD_U = (1 << 6), |
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FMA_CFG_MASK_Y_THRESHOLD_D = (1 << 7), |
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FMA_CFG_MASK_ALL = FMA_CFG_MASK_MIN_THRESHOLD | FMA_CFG_MASK_RATIO_THRESHOLD | |
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FMA_CFG_MASK_WIN_WIDTH | FMA_CFG_MASK_WIN_HEIGHT | |
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FMA_CFG_MASK_X_THRESHOLD_R | FMA_CFG_MASK_X_THRESHOLD_L | |
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FMA_CFG_MASK_Y_THRESHOLD_U | FMA_CFG_MASK_Y_THRESHOLD_D, |
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} fma_cfg_mask_t; |
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struct fma_user_cfg { |
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uint32_t cfg_mask; |
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uint32_t min_threshold; |
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uint16_t ratio_threshold; |
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uint16_t reserved; |
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uint16_t win_width; |
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uint16_t win_height; |
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uint16_t x_threshold_r; |
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uint16_t x_threshold_l; |
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uint16_t y_threshold_u; |
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uint16_t y_threshold_d; |
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}; |
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struct cavalry_fma_run { |
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/* Input */ |
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uint32_t output_daddr; |
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uint32_t output_size; |
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uint32_t target_coord_daddr; |
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uint32_t target_descriptor_daddr; |
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uint32_t reference_coord_daddr; |
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uint32_t reference_descriptor_daddr; |
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uint32_t mode : 1; // 0 for temporal, 1 for stereo |
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uint32_t reserved1 : 31; |
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struct fma_user_cfg stereo_cfg; |
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struct fma_user_cfg temporal_cfg; |
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/* Output */ |
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uint32_t rval; |
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uint32_t result_score_daddr; |
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uint32_t result_score_size; |
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uint32_t result_index_daddr; |
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uint32_t result_index_size; |
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uint32_t temporal_coord_daddr; |
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uint32_t temporal_coord_size; |
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uint32_t start_tick; |
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uint32_t end_tick; |
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}; |
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struct cavalry_stats_get { |
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uint32_t is_vp_idle : 1; |
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uint32_t reserved : 31; |
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int vp_current_pid; |
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}; |
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#define CAVALRY_QUERY_BUF _IOWR ('C', 0x0, struct cavalry_querybuf *) |
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#define CAVALRY_START_VP _IOWR ('C', 0x1, void *) |
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#define CAVALRY_STOP_VP _IOWR ('C', 0x2, void *) |
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#define CAVALRY_RUN_DAGS _IOWR ('C', 0x3, struct cavalry_run_dags *) |
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#define CAVALRY_START_LOG _IOWR ('C', 0x4, void *) |
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#define CAVALRY_STOP_LOG _IOWR ('C', 0x5, void *) |
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#define CAVALRY_EARLY_QUIT _IOWR ('C', 0x6, struct cavalry_early_quit *) |
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/* cv user memory ioctl */ |
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#define CAVALRY_ALLOC_MEM _IOWR ('C', 0x7, struct cavalry_mem *) |
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#define CAVALRY_FREE_MEM _IOWR ('C', 0x8, struct cavalry_mem *) |
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#define CAVALRY_SYNC_CACHE_MEM _IOWR ('C', 0x9, struct cavalry_cache_mem *) |
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#define CAVALRY_GET_USAGE_MEM _IOWR ('C', 0xA, struct cavalry_usage_mem *) |
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#define CAVALRY_RUN_HOTLINK_SLOT _IOWR ('C', 0xB, struct cavalry_run_hotlink_slot *) |
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#define CAVALRY_SET_HOTLINK_SLOT_CFG _IOWR ('C', 0xC, uint32_t *) |
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#define CAVALRY_GET_HOTLINK_SLOT_CFG _IOWR ('C', 0xD, uint32_t *) |
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#define CAVALRY_FEX_QUERY _IOWR ('C', 0xE, struct cavalry_fex_query *) |
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#define CAVALRY_FEX_RUN _IOWR ('C', 0xF, struct cavalry_fex_run *) |
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#define CAVALRY_FMA_QUERY _IOWR ('C', 0x10, struct cavalry_fma_query *) |
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#define CAVALRY_FMA_RUN _IOWR ('C', 0x11, struct cavalry_fma_run *) |
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#define CAVALRY_SET_LOG_LEVEL _IOWR ('C', 0x12, struct cavalry_set_log_level *) |
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#define CAVALRY_GET_STATS _IOWR ('C', 0x13, struct cavalry_stats_get *) |
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#endif //__CAVALRY_IOCTL_H__
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